1. Field of the Invention
This invention relates to a digital control bus system wherein function blocks, which may include digitally controllable integrated circuits (ICs), in electronic apparatus are connected through bus lines to allow signal transmissions therebetween.
2. Description of the Prior Art
Most video/audio apparatus such as television receivers, VTRs, and tape recorders that use digitally controllable ICs employ an inner bus system. Conventional electronic apparatus having an inner bus system includes a CPU, an inner bus, and a ROM as a control block. The control program for the respective circuits is stored in the ROM. In normal operation, the program is read out by the CPU and control signals are supplied to a predetermined circuit through the inner bus so that the corresponding digitally controllable IC performs a predetermined operation. These ICs are also controllable by a keyboard or a remote controller through the CPU and the inner bus.
A conventional inner bus is described in Japanese Patent Application laid open No. 57-106262, as a two-line system consisting of a data transmission line and a clock transmission line. For example, in a conventional TV set utilizing an inner bus system, a channel selection microprocessor, a non-volatile memory for storing control data, and a signal processing IC including a video processor and an audio processor are connected through a two-line inner bus. If a channel selection command is externally supplied to the TV set, for example, from a keyboard or a remote controller, the channel selection microprocessor reads out preset data corresponding to the selected channel from the memory and transmits the preset data to the signal processing IC. The channel selection microprocessor thus performs channel selection so as to cause the TV set to receive a predetermined broadcast signal.
In another conventional combined VTR and TV set utilizing an inner bus system, a TV block and a VTR block are controlled by a keyboard/remote controller decoder of a microprocessor through an inner bus.
In the above described inner bus systems, an inner bus is commonly used in individual electronic apparatus for time division processing. In other words, the bus cannot be used for simultaneous processing. For this reason, various operational limits and inconveniences result.
In the above described TV set with a remote controller, the channel selection microprocessor and the non-volatile memory are always supplied with operating power from a sub-power source. Main operating power is supplied from a source thereof to the signal processing IC upon operation of a power ON switch in the remote commander or controller. In a remote controller standby mode, the main power is not supplied to the signal processing IC which is off or grounded and the TV set waits to receive an operation command from the remote commander.
In this standby mode or state, the common inner bus is also grounded and the channel selection microprocessor cannot access the non-volatile memory through the inner bus. For example, if the signal processing IC has a surge protection diode at an input end connected to the inner bus, the cathode of such protection diode connected to the power source is grounded, and the inner bus is also thereby grounded.
Once the remote controller standby mode is set after a power failure or other interruption of power, a "last power flag" representing the TV operation mode immediately prior to the power failure cannot be read out from a memory area at the corresponding address of the non-volatile memory. As a result, the status prior to the power failure cannot be restored.
In the combined VTR and TV set, while the TV block occupies the bus to perform internal processing, the keyboard/remote controller decoder cannot send a signal to the VTR block. In addition, the VTR block cannot use the inner bus to perform its internal processing.
The following problem is also encountered due to common use of the bus by a TV and VTR. A master controller sends both data and address signals for designating a slave device. In this case, if signal processing ICs, for example, tuner ICs, having the identical slave addresses are provided in the TV and VTR blocks, confusion will occur.